|
Back
Up
Next
| |
A Bibliography on Capacity Modeling for Semiconductor Manufacturing
Section 22: Order Release
 | Americo L. Azevedo, Cesar Toscano, Jorge P. Sousa and Antonio L. Soares, "An Advanced Agent-Based Order Planning System for Dynamic Networked Enterprises," Production Planning and Control, Vol. 15, No. 2, 133-144, 2004. |
| N. Bahaji, "Simulation Study of the Effect of Dispatching Rules and
Lot Release Strategies in Semiconductor Fabrication Facilities,"
Master's Thesis, Louisiana State University and Agricultural and Mechanical
College, Department of Industrial and Manufacturing Systems Engineering,
December 2000. |
| M. Carlyle, K. Knutson, and J. Fowler, "Bin covering algorithms in
the second stage of the lot to order matching problem," Journal of the
Operational Research Society, Vol. 52, No. 11, 1232-1243, 2001. |
| H. C. Chen and C. E. Lee, "Downgrading and Release Rules for Control
and Dummy Wafers," International Journal of Industrial Engineering -
Theory, Applications and Practice, Vol. 11, No. 2, 197-206, 2004. |
| L. Cory, "Just-in-Time Approach to IC Fabrication," Solid State
Technology, 177-179, 1986. |
| K. Fordyce, D. Dalton, B. Gerard, R. Jesse, R. Sell, and G. Sullivan,
"Daily Output Planning: Integrating Operations Research, Artificial
Intelligence, And Real-Time Decision Support With APL2," Expert Systems
with Applications, Vol. 5, No. 3-4, 245-256, 1992. |
| J. W. Fowler, G. L. Hogg, and S. J. Mason, "Workload Control in the
Semiconductor Industry," Production Planning and Control Special Issue
on Workload Control, to appear, 2002. |
| C. R. Glassey and M. G. Resende, "Closed-Loop Job Release Control for
VLSI Circuit Manufacturing," IEEE Transactions on Semiconductor
Manufacturing, Vol. 1, No. 1, 36-46, 1988. See also Operations Research
Letters, Vol. 7, No. 5, 213-217, 1988. |
| A. Grosfeld-Nir and M. Magazine, "Gated MaxWIP: A Strategy for
Controlling Multistage Production Systems," International Journal of
Production Research, Vol. 40, No. 11, 2557-2567, 2002. |
| J. Kim, R. C. Leachman, and B. Suh, "Dynamic Release Control Policy
for the Semiconductor Wafer Fabrication Lines," Journal of the
Operations Research Society, Vol. 47, No. 12, 1516-1525, 1996. |
| R. McKiddie, "Some No-Panic Help for Wafer-Start Surges,
Semiconductor International, 115-120, June 1995. |
| P. R. Philipoom and T. D. Fry, "Capacity-Based Order Review/Release
Strategies to Improve Manufacturing Performance," International Journal
of Production Research, Vol. 30, No. 11, 2559-2572, 1992. |
| G. L. Ragatz and V. A. Mabert, "An Evaluation of Order Release
Mechanisms in a Job-Shop Environment," Decision Sciences, Vol. 19,
167-180, 1988. |
| L. M. Roderick, D. T. Phillips, and G. L. Hogg, "Comparison of Order
Release Strategies in Production Control Systems," International
Journal of Production Research, Vol. 30, No. 3, 611-626, 1992. |
| H. Tsubone, T. Kuroya, and H. Matsuura, "The Impact of Order Release
Strategies on the Manufacturing Performance for Shop Floor Control,"
Production Planning & Control, Vol. 10, No. 1, 58-66, 1999. |
|
